The SN74HC595N device contains an 8-bit serial-in, parallel-out shift register that feeds an 8 bit D type storage register. The storage register has parallel 3 state outputs. Separate clocks are provided for both the shift and storage register. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and serial outputs for cascading. When the output-enable (OE) input is high, the outputs are in the high-impedance state. Both the shift register clock (SRCLK) and storage register clock (RCLK) are positive-edge triggered. If both clocks are connected together, the shift register always is one clock pulse ahead of the storage register.
- 8 bit serial-in, parallel-out shift
- Wide operating voltage range of 2V to 6V
- High current 3 state outputs can drive up To 15 LSTTL loads
- Low power consumption: 80µA max.
- ±6-mA output drive at 5V
- Low input current: 1µA max.
- Shift register has direct clear
Clock & Timing, Consumer Electronics, Embedded Design & Development